Advanced Packaging for Semiconductor Chips: Heterogeneous Integration and Impacts on Electronic Circuit Industry
This paper introduces post-Moore’s-Law semiconductor advanced packaging including 2.5D/3.0D packaging, heterogeneous integration, CoWoS, EMIB, fan-out, CPO and panel-level packaging. It analyzes how advanced packaging blurs boundaries among chips, packages and PCBs and drives upgrades in IC substrate, materials and manufacturing equipment.