In the era of deep integration between mobile internet and smart devices, smartphones have become the core equipment for daily life and work for users worldwide.
With the full commercialization of 5G technology and the widespread application of artificial intelligence, smartphones are evolving rapidly.
Continuous upgrades in imaging and gaming capabilities are also accelerating this trend.
As a result, smartphones are moving toward thinner designs, higher performance, and multifunctional integration.
This presents unprecedented challenges for the “nerve center” of smartphones—printed circuit boards (PCBs).
High-density interconnect (HDI) PCBs offer high routing density, superior signal transmission performance, and strong spatial integration capabilities.
Because of these advantages, they have become key components that enable technological breakthroughs in smartphones.
Traditional PCB technologies struggle to meet the increasingly complex functional demands of smartphones.
As these demands grow, limitations such as insufficient routing, poor signal integrity, and inefficient interlayer interconnections become increasingly apparent.
As an advanced circuit technology, HDI boards significantly enhance circuit integration through precision layout techniques and laser microvia processing.
They shorten signal paths and reduce electromagnetic interference, establishing themselves as a critical enabling technology for smartphone advancement.
This paper investigates key manufacturing techniques—including thin-core board fabrication, alignment accuracy, and precision patterning—using a 12-layer, 6-level arbitrary layer interconnection HDI board as a case study.
The research aims to provide valuable insights for producing high-end circuit boards for smartphones.
Experimental Section
Product Structure
This product is a 12-layer, 6-level HDI circuit board featuring an arbitrary-layer interconnect design.
The analysis discusses several technical challenges in the manufacturing process, including thin core board fabrication, alignment accuracy for high-order blind and via-through holes, precision pattern formation, and lamination parameters.
It also proposes corresponding solutions to address these issues.
Figure 1 illustrates the product’s lamination structure, with key parameters listed in Table 1.
Manufacturing Process Flow
This 12-layer, 6-level HDI product for smartphone circuit boards undergoes over 100 processes, including 6 laser drilling operations, via plating, precision patterning, and 5 lamination steps.
It presents significant challenges in material pressure resistance, drilling accuracy, pattern alignment, and final product reliability.
Key technical hurdles include thin core board fabrication, laser drilling, via plating, pattern alignment, stacking hole alignment, precision circuit formation, and impedance consistency.
◊ L6–L7 Inner Layer Process Flow
The specific process flow is as follows: L6-L7: Material cutting → Baking → Laser positioning hole drilling → Brown passivation → Laser drilling → Plasma treatment → Brown passivation removal → Blind hole AOI → Electroplating → Via filling electroplating → Inner layer pattern formation → Inner layer etching → Line width measurement → Sub-outer layer AOI → Brown passivation。
◊ Secondary Outer Layer Fabrication
Secondary Outer Layer: Laminate → Target Hole Drilling → LDD Passivation → Laser Drilling → Plasma Treatment → Passivation Removal → Blind Hole AOI → Inner Layer Copper Plating → Whole Board Hole Filling Plating → Die-Slicing Analysis → Secondary Outer Layer Pattern Formation → Secondary Outer Layer Etching → Line Width Measurement → Secondary Outer Layer AOI → Passivation
◊ Outer Layer Processing and Final Assembly
Outer Layer: Laminate → Target hole drilling → LDD passivation → Laser drilling → Outer layer drilling → High-pressure washing → Plasma treatment → Passivation removal → Blind hole AOI → Outer layer copper plating → Through-hole plating → Cross-section analysis → Outer layer pattern → Outer layer vacuum etching → Impedance test → HCT test → Outer layer AOI → Solder mask screen printing → Character screen printing → Impedance Testing → Reflow Soldering → Sandblasting → Silk Screen Anti-Corrosion Gold Ink → Nickel Plating → Film Removal Electrolysis → Testing → 4-Wire Testing → Forming → Board Bend Inspection → Hole Inspection → Anti-Oxidation → FOC → FOA → Packaging
Production Control Challenges
Data analysis and risk assessment identified the following key production control challenges based on the factory’s manufacturing processes：
(1) Core board thickness of 56mm: Conventional fabrication often causes board jamming.
Laser-processed holes may retain adhesive residue at the bottom, compromising product reliability. Electroplating frequently results in wrinkling, impacting yield rates.
(2) The product undergoes 5 lamination processes and 6 laser drilling operations, making it difficult to control laser alignment accuracy and the reliability of laser hole stacking.
(3) Mobile phone products feature high wiring density, making pattern fabrication challenging.
(4) The 6-layer arbitrary interconnection product demands high reliability for blind vias.
Results and Discussion
Thin Core Board Fabrication
This product features an arbitrary interconnection design, requiring laser microvia technology to connect any layer from the core board to the outer layers.
The core board layer in mobile phone products is exceptionally thin, measuring only 56 μm in thickness.
Each production process step carries a high risk of board rejection, demanding stringent process control and design.
Additionally, the via-plating process for thin boards severely tests equipment capabilities. Key bottlenecks in thin core board fabrication are as follows:
(1) Core boards utilize laser direct drilling, demanding high-quality hole bottoms:
(2) Plasma stripping effectiveness on thin boards directly determines finished product reliability:
(3) Plating during via filling on thin boards is prone to wrinkling and poor fill coverage, impacting subsequent laser stacking processes;
(4) Pattern formation on thin boards presents significant challenges.
◊ Optimization of Laser Drilling and Plasma Processing
To resolve the core board manufacturing bottlenecks mentioned above, we propose the following optimization solutions：
(1) Laser Parameter Control
Using 18mm thick copper foil paired with RTF copper foil can significantly improve laser hole bottom quality. Laser process testing optimizes laser parameters (see Table 2).
These laser parameters represent the optimal results obtained through multiple tests. Actual production may require adjustments based on specific conditions.
Additionally, ensure that the measured aperture of through holes is ≥90%, measure blind hole apertures, and inspect hole bottoms to prevent laser penetration through the copper layer.
(2) Plasma Stripping Process Control
After laser drilling, we used plasma gas for de-gumming and simultaneously tested the plasma de-gumming parameters and effectiveness. See Table 3 for details.
You must calculate the stripping rate using a stripping-rate test piece. Thin core boards require auxiliary tools during plasma stripping to prevent wrinkling, which could affect pattern formation.
After plasma stripping, you must remove the passivation layer and inspect the blind-via bottoms using AOI equipment.
(3) Double-Sided Clamping for Thin-Board Plating
Due to the absence of horizontal plating lines in the current factory, conventional vertical plating lines may cause wrinkles due to insufficient fixture clamping force.
Product oscillation during manufacturing leads to uneven copper plating thickness.
You must use double-sided clamping plating fixtures to secure the product from both the top and bottom, preventing thin boards from oscillating or wrinkling during production.
Additionally, dual-side clamping enables electrical conductivity through both upper and lower surfaces, ensuring uniform board thickness. Refer to Figure 2 for the fixture diagram.
Testing has confirmed that double-sided clamping electroplating fixtures effectively prevent thin board wrinkling.
They also ensure good copper thickness uniformity and achieve nearly 100% via-hole fill saturation. These results meet the product specifications.
(4) Wet Film Lamination for Thin Core Boards
With a core board thickness of 57 μm, conventional in-house dry film lamination for pattern formation often leads to poor film adhesion and low etching yield.
For thin core boards, the production line focuses on inner layer pattern processes.
Following standard inner layer core board manufacturing procedures, wet film replaces dry film for pattern formation.
The wet film utilizes high-resolution liquid photosensitive ink with a resolution of 35 μm, and the uniformity of film thickness after application meets requirements.
In actual production, the wet film’s excellent filling properties enable precision pattern fabrication.
Combined with a high-precision LDI exposure system, it meets the requirements for line width/spacing of 40/50 μm.
Alignment and Testing Module
Mobile phone products and any interconnected devices inevitably feature small apertures, small pads, and dense circuit designs, which demand higher alignment precision.
The current standard practice involves using drill targets for positioning, laser-engraved drill targets for fabrication, and pattern-based laser target alignment.
As the number of laser passes increases, cumulative misalignment in this method becomes more severe.
This misalignment often causes offset holes, which can lead to laser misconnections and short circuits in the finished products.
These issues pose significant quality risks. Figure 3 illustrates the effects of blind-hole misalignment.
Analyze the misalignment error of the drill target positioning. Open the drill target positioning process as shown in Figure 4.
From the drill target alignment perspective, we use laser alignment for drill targets and use laser ring targets for outer-layer pattern alignment.
These two alignment systems introduce relative errors, which cause misalignment among the final laser micro-holes, inner-layer patterns, and outer-layer patterns.
To solve this issue, we propose an optimization solution: uniformly adopt inner-layer target-point alignment.
We use the drill target only to locate the inner-layer target points, and then we laser-etch those points.
Both the laser process and the pattern alignment will use the inner-layer target points. Figure 5 shows the optimized workflow.
To further enhance alignment accuracy, we must add multiple inspection modules.
During actual production, the alignment status of these inspection modules ensures that the finished product meets alignment requirements.
1. Laser Alignment Inspection Module
Due to stringent alignment requirements for blind holes in finished products, missed connections often only become apparent during electrical testing.
During laser drilling, the laser alignment inspection module monitors laser alignment.
We promptly adjust any anomalies to prevent losses caused by undetected misalignment after drilling.
The laser alignment module uses a design that incorporates the smallest hole ring on the board.
During laser drilling, we first create the holes for the alignment module and then verify the bottom alignment under a microscope.
Module Design Approach: Position the smallest through-hole ring at location #3.
Gradually tighten the design for locations #2 and #1, placing them around the perimeter and center of the working board.
During laser pilot drilling, inspect the laser hole positions under a microscope for any substrate exposure.
Ensure that location #3 shows no substrate exposure, and capture and save a screenshot. Figure 6 shows the module diagram.
For both the first and last parts in laser drilling, you must verify alignment with the alignment module to prevent missing blind holes.
Additionally, laser drilling requires tightening alignment to 95% of the specified alignment value.
2. Finished Blind Hole Alignment Module
The blind hole alignment module, also known as the resonance test module, facilitates finished product measurement to verify laser alignment accuracy for each instance.
By stacking layers with progressively tighter tolerances, you can determine the range of blind-hole misalignment.
The module features three alignment points spaced at: PAD-20μm, PAD-10μm, and PAD.
By gradually tightening tolerances, we measure the laser blind-hole alignment during electrical testing. Figure 7 shows the blind-hole alignment module diagram.
The blind-hole alignment module measures blind-hole loudness in the finished product to verify alignment accuracy.
This process ensures that the blind-hole alignment meets requirements and that the overall alignment of high-order holes complies with specifications.
The finished product cross-section is shown in Figure 8.
3. High Current Test Module (HCT Test)
To ensure blind-via reliability, we design a high-current test module within the PNL for evaluation.
High Current Test involves designing a continuous chain of holes within the current board.
The module’s inherent resistance converts the electrical energy flowing through the hole chain into thermal energy, which generates tensile forces in multiple directions.
During testing, the temperature rises from room temperature to 220–260°C within one minute.
If defects exist in the plating integrity of blind holes or the bonding between plated copper layers, the equipment will trigger an alarm.
Failure analysis will then be conducted to confirm blind via reliability. The HCT test module design is shown in Figure 9.
Through the Full Test HCT module, efficiently verify blind via reliability.
Combined with finished product reliability testing, this approach prevents reliability risks associated with abnormal blind via bonding.
Precision Pattern Fabrication
The production of mobile phone products inevitably involves precision pattern fabrication. This product features line widths/spacing of 40/50μm.
During manufacturing, we implemented improvements across several aspects, including equipment selection, line-resolution etching uniformity, copper-plating thickness uniformity, and dynamic line compensation.
These improvements help ensure that the process meets precision pattern fabrication requirements.
(1) For precision lines, we use a 25-micron dry film together with a high-precision LDI exposure system to achieve excellent resolution.
Post-development measurements confirm both line width and spacing meet specifications.
We use vacuum etching together with two-fluid line etching: vacuum etching effectively prevents pooling, and fluid etching improves the etch factor.
Line width measurements consistently fall within tolerances, satisfying customer requirements.
(2) We use vacuum etching together with two-fluid line etching: vacuum etching effectively prevents pooling, and fluid etching improves the etch factor.
(3) Prior to pattern formation, CMI full copper thickness measurement was performed, with 9 points measured on each wafer (top, middle, bottom). This ensured copper thickness within 20 ± 3 μm tolerance.
(4) To achieve line width consistency, dynamic compensation was applied to the circuitry.
Different compensation values were assigned based on varying spacings, line width types, and pads. The compensation values are shown in Figure 10.
Through improvements in the above areas, line widths are now within the required range, meeting the demands for precision circuit fabrication.
Test Results
To verify product reliability, the product underwent reliability testing including thermal shock, pad pull-off, blind hole pull-off, dielectric strength, and thermal cycling tests.
All test results were satisfactory.
Conclusion
High-density interconnect (HDI) circuit boards for smartphones serve not only as their physical carriers but also as critical components ensuring smartphone performance and reliability.
This paper analyzes key technologies for smartphone HDI circuit boards, covering chip-on-board fabrication, alignment accuracy, precision patterning, and finished product reliability.
Corresponding optimization solutions are proposed for identified challenges.
Following these optimized procedures, the overall yield meets requirements, and the product has passed customer validation.
