High-Layer-Count PCB Manufacturing: Core Challenges and Key Process Control Guidelines

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With the development of electronic information technology, multilayer PCBs are being used in an increasing number of fields.

Traditionally, we define PCBs with four or more layers as “multilayer PCBs,” and those with ten or more layers as “high-layer-count PCBs.”

The ability to manufacture high-layer-count PCBs is a key indicator of a PCB manufacturer’s capabilities.

A PCB company capable of producing high-layer-count PCBs with 20 or more layers is considered to possess top-tier technical expertise.

It is commonly acknowledged that multilayer PCBs come with high manufacturing costs due to production difficulties.

Nevertheless, numerous customers fail to understand the complexities behind the manufacturing process.

This misunderstanding leads them to suspect that manufacturers merely make excuses to charge excessive prices.

Today, an experienced PCB engineer will explain in detail: Why is the manufacturing of multilayer PCBs so difficult?

Major Manufacturing Challenges

Compared to conventional PCBs, high-layer PCBs are thicker, have more layers, feature denser traces and vias, have larger cell sizes, and use thinner dielectric layers.

As a result, the requirements for internal layer spacing, interlayer alignment, impedance control, and reliability are much more stringent.

  • Challenges in Interlayer Alignment

Due to the large number of layers in high-layer-count PCBs, customers are imposing increasingly stringent alignment requirements on each layer.

Typically, interlayer alignment tolerances are controlled within ±75 μm.

However, high-layer-count PCBs have larger unit dimensions. The temperature and humidity conditions in the pattern transfer workshop also affect processing stability.

Inconsistent thermal expansion and contraction among different core layers causes cumulative misalignment. Interlayer positioning methods add further constraints.

All these factors make interlayer alignment control far more challenging for high-layer-count PCBs.

  • Challenges in Inner Layer Trace Fabrication

High-layer boards adopt special types of materials. These cover high-TG, high-speed, high-frequency, thick copper, and thin dielectric layer materials.

These special materials bring strict process constraints. They impose rigorous standards for inner layer trace fabrication and pattern dimension control.

Narrow line widths and spacing lead to an increase in open circuits and micro-short circuits, resulting in a low yield rate;

The presence of numerous signal layers with fine, dense circuits increases the likelihood of missed defects during inner-layer AOI inspection;

The relatively thin inner-layer core boards are prone to wrinkling, causing poor exposure, and are susceptible to curling during etching; the cost of scrapping finished products is relatively high.

  • Challenges in Laminating

Stacking multiple inner core boards and prepregs can easily lead to defects such as board slippage, delamination, resin voids, and residual air bubbles during the lamination process.

When designing the stack-up structure, designers must fully evaluate core material characteristics.

These characteristics cover heat resistance, voltage withstand capability, resin content, and dielectric thickness.

This is a prerequisite for establishing a reliable lamination program for high-layer boards.

  • Challenges in Drilling

The use of special board materials—such as those with high TG, high-speed, high-frequency, and thick copper—increases the difficulty of controlling drilling roughness, removing burrs, and cleaning drill residue.

With a high number of layers and the cumulative total copper thickness and board thickness, drill bits are prone to breaking;

Dense BGA arrangements and narrow hole-to-hole spacing can lead to CAF failures; and the board thickness can easily cause skewed drilling.

Control of Key Production Processes

  • Material Selection

Electronic circuit materials are required to possess low dielectric constant and low dielectric loss.

They also need low CTE and low water absorption characteristics. High-performance copper-clad laminate materials are indispensable.

These properties collectively meet the processing and reliability requirements of high-layer-count boards.

  • Lamination Structure Design

The primary factors considered in lamination structure design include the material’s heat resistance, voltage withstand capability, resin content, and dielectric layer thickness.

The following key principles should be followed:

(1) The manufacturers of the prepreg and core boards must be consistent.

To ensure PCB reliability, avoid using single sheets of 1080 or 106 prepreg for all layers (unless the customer has specific requirements).

When the customer does not specify a dielectric thickness, the dielectric thickness between each layer must be ≥0.09 mm in accordance with IPC-A-600G.

(2) When the customer requires high-TG (glass transition temperature) materials, both the core board and prepreg must use corresponding high-TG materials.

(3) For inner-layer substrates of 3 oz or higher, select prepregs with high resin content;

However, avoid structural designs that rely entirely on 106 high-resin prepregs whenever possible.

 (4) Unless otherwise specified by the customer, the thickness tolerance for interlayer dielectric layers is generally controlled at ±10%.

For impedance-controlled boards, the dielectric thickness tolerance must comply with IPC-4101 Class C/M tolerances.

If impedance is influenced by substrate thickness, the board thickness tolerance must also comply with IPC-4101 Class C/M tolerances.

  • Interlayer Alignment Control

To guarantee precise dimensional compensation and production control for inner core layers, manufacturers shall utilize long-term production data, historical records, and practical experience.

Precise pattern-dimensional compensation is performed for each layer of high-layer PCBs.

This method ensures uniform expansion and contraction across all core layers.

  • Inner Layer Circuit Process

Since the resolution of traditional exposure systems is around 50 μm, laser direct imaging (LDI) systems can be introduced for the production of high-layer boards to improve pattern resolution to approximately 20 μm.

Traditional exposure systems have an alignment accuracy of ±25 μm, with interlayer alignment accuracy exceeding 50 μm;

By using high-precision alignment exposure systems, pattern alignment accuracy can be improved to approximately 15 μm, and interlayer alignment accuracy can be controlled within 30 μm.

  • Lamination Process

Currently, the primary methods for interlayer positioning prior to lamination include: four-groove positioning (Pin LAM), hot melt, rivets, and a combination of hot melt and rivets.

Different positioning methods are used depending on the product structure.

For multilayer boards, either the four-groove positioning method or a combination of hot melt and riveting is used.

An OPE punching machine punches the positioning holes, with punching accuracy controlled within ±25 μm.

Based on the laminate structure and materials used, an appropriate lamination program is developed to set the optimal heating rate and curve.

The laminate heating rate is appropriately reduced. The high-temperature curing time is extended sufficiently.

This ensures full resin flow and complete curing. It prevents lamination problems such as board slippage and interlayer misalignment.

  • Drilling Process

Due to the excessive thickness of the PCB and copper layers resulting from the laminated structure, drill bits experience severe wear and are prone to breakage;

Therefore, the number of holes, feed rate, and rotational speed should be appropriately reduced.

Accurately measure the PCB’s expansion and contraction to provide precise coefficients.

For PCBs with 14 or more layers, hole diameters ≤0.2 mm, or hole-to-trace distances ≤0.175 mm, special equipment specifications apply.

Operators shall use a drilling machine with a positioning accuracy no greater than 0.025 mm.

For holes with a diameter of φ4.0 mm or larger, use step drilling;

For a thickness-to-diameter ratio of 12:1 or higher, apply step drilling with forward and reverse drilling methods.

Control drilling burrs and hole surface roughness during processing.

For high-layer count boards, use new or reground drill bits as much as possible. Keep the hole roughness within 25 μm.

Reliability Testing

High-layer PCBs are thicker, heavier, and have larger component sizes than conventional multilayer PCBs.

Consequently, they have a higher heat capacity, requiring more heat during soldering and exposing them to high temperatures for a longer duration.

At 217°C (the melting point of tin-silver-copper solder), this process takes 50 to 90 seconds.

Additionally, high-layer PCBs cool relatively slowly, which extends the time required to pass the reflow soldering test.

The above is a detailed explanation from an experienced PCB engineer addressing the question, “Why is manufacturing multilayer PCBs so difficult?”

Through this discussion, we believe you now have a deeper understanding of the multilayer PCB manufacturing process, and you likely understand why multilayer PCBs are so expensive!

Indeed, the PCB manufacturing process is complex, and manufacturing multilayer PCBs is even more challenging.

This is exactly what the saying “you get what you pay for” means. We hope this information has been helpful to you.

Conclusion

Manufacturing multilayer and high-layer-count PCBs is far more complex than simply stacking more circuit layers together.

As layer counts increase, manufacturers must simultaneously control interlayer alignment, fine-line fabrication, lamination, drilling, material selection, impedance, and long-term reliability. 

Even small deviations in any of these processes can lead to defects, low yields, or serious reliability issues.

From material selection and stack-up design to precision exposure, lamination, drilling, and reliability testing, every stage requires specialized equipment, accurate process parameters, experienced engineers, and strict quality control.

 The higher the layer count, the narrower the process window and the greater the manufacturing risk.

Therefore, the higher cost of multilayer PCBs reflects not only the additional materials used but also the advanced technology, equipment, process control, engineering expertise, and quality assurance required throughout the production process.

For customers, understanding these manufacturing challenges makes it easier to evaluate PCB quotations objectively and select a capable manufacturer rather than focusing solely on the lowest price. 

In high-layer-count PCB manufacturing, quality, consistency, reliability, and manufacturing capability ultimately determine the true value of the product.

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